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Neuroevolving Electronic Dynamical Networks

Publication: arXiv preprint
Date: April 6, 2024
Author: Derek Whitley

Abstract

This work explores using evolutionary algorithms to optimize artificial neural networks, with a focus on accelerating fitness evaluation. The author addresses computational bottlenecks in continuous time recurrent neural networks by leveraging FPGAs (field programmable gate arrays). The key innovation involves implementing dynamic and partial reconfiguration on capable FPGAs to enable hyper-parallel evaluation, significantly reducing assessment time and accelerating the neuroevolutionary process by orders of magnitude.

Suggested Citation

D. Whitley, "Neuroevolving Electronic Dynamical Networks," arXiv preprint arXiv:2404.04587, 2024.

Authors

  • Derek Whitley