Projects¶
Explore the active projects in Evolvable Hardware research.
Bitstream Evolution (iCEstick)¶
An open-source platform for intrinsic analog evolvable hardware research using the Lattice iCE40 HX1K FPGA on the iCEstick development board.
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Hardware Setup
Bill of materials, assembly instructions, and wiring guide for the iCEstick evaluation board.
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Software
The BitstreamEvolution toolkit — evolutionary algorithms, bitstream manipulation, and FPGA communication.
Bitstream Evolution (pico2-ice)¶
Porting the Bitstream Evolution toolkit to the pico2-ice development board, enabling new hardware capabilities and parallel evaluation across multiple FPGAs.
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Hardware Setup
Setup instructions and troubleshooting for the pico2-ice development board.
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Software
The pico2-ice port of the BitstreamEvolution toolkit with board-specific firmware and communication.
iCEFARM¶
FPGA Array Resource Manager — a parallel evaluation system that distributes evolutionary runs across multiple pico2-ice boards simultaneously.
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Hardware Setup
Hardware configuration for deploying an array of pico2-ice boards for parallel FPGA evaluation.
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Software
Job distribution and board management software for the iCEFARM parallel evaluation system.
iCE40 Memory Controller¶
A Verilog-based hardware project for reading and writing to Block RAM (BRAM) on iCE40 FPGAs, supporting both the HX1K and UP5K devices.
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Overview
BRAM and SPRAM interfaces with UART communication and automated testbenches for iCE40 devices.
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Software
Verilog memory controller with Python host scripts for pico-ice and pico2-ice boards.
PUFFS¶
PyTest Unified Framework for FPGA Simulation — a testing framework combining pytest with cocotb for hardware design verification.
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Overview
Unified testing environment for FPGA designs using familiar Python workflows with cocotb simulation.
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Software
Python-based testing framework with gold models, unit tests, and RTL design verification.